(1) Field of the Invention
The present invention relates to a semiconductor memory device, more particularly to a semiconductor memory device such as a dynamic random access memory (d-RAM) which has a protective structure against soft errors caused by radiation from a package incident on memory cells.
(2) Description of the Prior Art
Metal oxide semiconductor (MOS) d-RAMs have recently come into wide use as semiconductor memories. Such MOS d-RAMs, however, suffer from the problem of soft errors induced by alpha particles. These alpha particles result from the alpha decay of atoms such as uranium and thorium contained in the package material of the semiconductor memory device. The alpha particles incident on the memory cells can produce electron-hole pairs and may destroy information stored in the memory cells.
An MOS d-RAM comprises a plurality of memory cells comprises a switching transistor and a storage capacitor, the storage capacitor comprises an insulating film formed on a semiconductor substrate, a cell plate formed on the insulating film, and a depletion region or a storage node disposed below the insulating film in the semiconductor substrate.
When electron-hole pairs are produced by penetration of alpha particles into the semiconductor substrate, majority carriers flow to an electrode on the bottom of the substrate, but minority carriers diffuse in the substrate during their life-times. If the minority carriers reach the depletion region, they are collected there to neutralize carriers stored therein, lowering the potential of the storage node. Therefore, when a storage node in a memory cell collects minority carriers produced by incident alpha rays, the output voltages of the memory cell may be lowered and obscured by noise so that the stored information cannot be discriminated. Sometimes, the output voltages may be changed to the opposite polarity so that the stored information is made different from the original information.
To resolve the problem, it has been proposed to provide protective structures to prevent collection of radiation-induced carriers in storage nodes. In one proposal, an epitaxial layer is formed on the semiconductor substrate, the conductivity of the epitaxial layer being opposite to that of the substrate, and the MOS d-RAM is formed in and on the epitaxial layer (see M. J. McNutt, IEEE Trans. on Nuc. Sci., NS-27, No. 5, pp 1138-1342, 1980). In another proposal, a buried grid or layer is formed in a semiconductor substrate by an ultra high energy ion-implantation, the conductivity of the grid or layer being opposite to that of the substrate. The MOS d-RAM is then formed in and on the substrate so that the grid or layer is separated from the storage nodes formed in the substrate (see Japanese Unexamined Patent Publication (Kokai) No. 55-156358; M. R. Wordeman et al, "A Buried N-Grid for Protection Against Radiation Induced Charge Collection in Electronic Circuits", IEEE IEDM 81, pp 40-43, 1981). The first proposal significantly increases the cost of the memory device since it necessitates the addition of an epitaxial semiconductor layer, which is not usually used in an MOS type semiconductor memory device. As for the second proposal, formation of a buried grid or layer in a semiconductor substrate by ultra high energy ion-implantation deteriorates the quality of crystals of the semiconductor substrate resulting in, for example, lower device gain.